Team of University Researchers Model Low Power Microchip

A joint team of researchers from Texas-based Rice University and Nanyang Technological University (NTU) in Singapore have designed a low power microchip called PCMOS and have revealed their results at the International Solid-State Circuits Conference (ISSCC), the forum for research engineers working on cutting edge technology.

 

According to the universities, PCMOS uses 30 times less power and runs 7 times faster than the best microchips available today. The computer chip thrives on the logic of random errors and piggybacks on the "complementary metal-oxide semiconductor" (CMOS) technology already in use by the chipmakers. As it makes use of the CMOS tech chipmakers need not go looking for newer materials and can design this chip with standard silicon itself.

 

"A significant achievement here is the validation of Rice's probabilistic analogue to Boolean logic using PCMOS," said Shekhar Borkar, an Intel (News - Alert) Fellow and director of Intel’s Microprocessor Technology Lab. "Coupled with the significant energy and speed advantages that PCMOS offers, this logic will prove extremely important because basic physics dictates that future transistor-based logic will need probabilistic methods."

 

PCMOS is ‘Probabilistic CMOS’ and uses a new radical probabilistic logic developed by Rice University Professor Krishna Palem and his doctoral student, Lakshmi Chakrapani. The chip benefits from impreciseness and this logic enables it to operate with drastically less power.

 

PCMOS was jointly validated by Rice and NTU via a joint institute that Palem founded in 2007, the Institute for Sustainable Nanoelectronics (ISNE). Directed by Palem, ISNE is based at NTU, where the first prototype PCMOS chips were manufactured last year in collaboration with Professor Yeo Kiat Seng and his team.

 

Existing silicon transistors become increasingly noisy as they decrease in size. To counter this noise, designers usually boost the operating voltage to overpower it and ensure accuracy of the calculations and therefore more power is wasted.

 

The PCMOS development team states that their chip is fundamentally different. The chip design neglects to boost voltage for countering the noise to save power dramatically and the resulting errors and uncertainties are embraced for the probabilistic logic.  

 

The Rice-NTU team is hoping to follow-up its proof-of-concept work on encryption with proof-of-concept tests on microchips for cell phones, graphics cards and medical implants.

 

“For example, in a streaming video application on a mobile phone, the small display -- combined with the human brain's ability to process less-than-perfect pictures – results in a case where the picture looks just as good with a calculation that's only approximately correct,” explained Palem.

 

According to the researchers, their goal is green computing and to look for apps where PCMOS can be implemented to provide best computations with lowest power.